1. Field of the Invention
The present invention generally relates to systems and methods for integrating one or more process modules into a metrology and/or inspection tool.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices such as ICs. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail.
The embodiments described herein may improve the sensitivity of defect inspection on patterned surfaces where the patterned structures are not fabricated as intended. The inspection of these surfaces may involve directing light onto such surfaces, collecting light from the surface and processing the collected light to determine whether defects are present. An example of this can be in semiconductor wafer manufacturing where thin-film layers are processed with lithography creating patterns in the surface that are subsequently etched and processed to create semiconductor devices. In the lithography process, a layer of photoresist is deposited on the surface and the photoresist is illuminated with a pattern that is developed and processed to establish a pattern that will be etched into the surface to create a layer for the semiconductor device. Defects within photoresist layers are an example of low-signal producing defects where some amplification of detection signals may be required to adequately identify defects. This need may be higher when considering the extreme ultraviolet (EUV) lithography requirements for detecting printed defects from the mask. Prior methods for accounting for low level signals included optimization of the inspection parameters of light, spectral band, aperture mode and tool speed/pixel to identify an optimal inspection recipe.
However, such optimizations may be insufficient for detecting signal levels on print-check wafers (sometimes called “flop-down wafers”) resulting from ever-smaller defects in future design rules (DR) (e.g., a 15 nm DR having allowed excursions of 1/10 of the line width or 1.5 nm) established from EUV mask inspection requirements.
Defect review typically involves re-detecting defects detected as such by an inspection process and generating additional information about the defects at a higher resolution using either a high magnification optical system or a scanning electron microscope (SEM). Defect review is therefore performed at discrete locations on the wafer where defects have been detected by inspection. The higher resolution data for the defects generated by defect review is more suitable fir determining attributes of the defects such as profile, roughness, more accurate size information, etc.
Metrology processes are also used at various steps during a semiconductor manufacturing process to monitor and control the process. Metrology processes are different than inspection processes in that, unlike inspection processes in which defects are detected on a wafer, metrology processes are used to measure one or more characteristics of the wafer that cannot be determined using currently used inspection tools. For example, metrology processes are used to measure one or more characteristics of a wafer such as a dimension (e.g., line width, thickness, etc.) of features formed on the wafer during a process such that the performance of the process can be determined from the one or more characteristics. In addition, if the one or more characteristics of the wafer are unacceptable (e.g., out of a predetermined range for the characteristic(s)), the measurements of the one or more characteristics of the wafer may be used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristic(s).
Metrology processes are also different than defect review processes in that, unlike defect review processes in which defects that are detected by inspection are re-visited in defect review, metrology processes may be performed at locations at which no defect has been detected. In other words, unlike defect review, the locations at which a metrology process is performed on a wafer may be independent of the results of an inspection process performed on the wafer. In particular, the locations at which a metrology process is performed may be selected independently of inspection results. In addition, since locations on the wafer at which metrology is performed may be selected independently of inspection results, unlike defect review in which the locations on the wafer at which defect review is to be performed cannot be determined until the inspection results for the wafer are generated and available for use, the locations at which the metrology process is performed may be determined before an inspection process has been performed on the wafer.
Accordingly, it would be advantageous to develop methods and systems for performing one or more processes on a specimen that do not have one or more disadvantages described above.